数字集成电路设计：从VLSI体系结构到CMOS制造（英文版）
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作者： （瑞士）克斯林著
出 版 社： 人民邮电出版社
出版时间： 2010-5-1字数： 872000版次： 1页数： 845印刷时间： 2010-5-1开本： 16开印次： 1纸张： 胶版纸I S B N ： 9787115223586包装： 平装
本书从架构与算法讲起，介绍了功能验证、VHDL建模、同步电路设计、异步数据获取、能耗与散热、信号完整性、物理设计、设计验证等必备技术，还讲解了VLSI经济运作与项目管理，并简单阐释了CMOS技术的基础知识，全面覆盖了数字集成电路的整个设计开发过程。
本书既可作为高等院校微电子、电子技术等相关专业高年级师生和研究生的参考教材，也可供半导体行业工程师参考。
Chapter 1Introduction to Microelectronics
1.1Economic impact
1.2Concepts and terminology
1.2.1The Guinness book of records point of view
1.2.2The marketing point of view
1.2.3The fabrication point of view
1.2.4The design engineer's point of view
1.2.5The business point of view
1.3Design flow in digital VLSI
1.3.1The Y-chart, a map of digital electronic systems
1.3.2Major stages in VLSI design
1.3.3Cell libraries
1.3.4Electronic design automation software
1.4Field-programmable logic
1.4.1Configuration technologies
1.4.2Organization of hardware resources
1.4.3Commercial products
1.5Problems
1.6Appendix I: A brief glossary of logic families
1.7Appendix II: An illustrated glossary of circuit-related terms
Chapter 2From Algorithms to Architectures
2.1The goals of architecture design
2.1.1Agenda
2.2The architectural antipodes
2.2.1What makes an algorithm suitable for a dedicated VLSI architecture?
2.2.2There is plenty of land between the architectural antipodes
2.2.3Assemblies of general-purpose and dedicated processing units
2.2.4Coprocessors
2.2.5Application-specific instruction set processors
2.2.6Configurable computing
2.2.7Extendable instruction set processors
2.2.8Digest
2.3 Atransform approach to VLSI architecture design
2.3.1There is room for remodelling in the algorithmic domain 62
2.3.2...and there is room in the architectural domain
2.3.3Systems engineers and VLSI designers must collaborate
2.3.4A graph-based formalism for describing processing algorithms
2.3.5The isomorphic architecture
2.3.6Relative merits of architectural alternatives
2.3.7Computation cycle versus clock period
2.4Equivalence transforms for combinational computations
2.4.1Common assumptions
2.4.2Iterative decomposition
2.4.3Pipelining
2.4.4Replication
2.4.5Time sharing
2.4.6Associativity transform
2.4.7Other algebraic transforms
2.4.8Digest
2.5Options for temporary storage of data
2.5.1Data access patterns
2.5.2Available memory configurations and area occupation
2.5.3Storage capacities
2.5.4Wiring and the costs of going off-chip
2.5.5Latency and timing
2.5.6Digest
2.6Equivalence transforms for nonrecursive computations
2.6.1Retiming
2.6.2Pipelining revisited
2.6.3Systolic conversion
2.6.4Iterative decomposition and time-sharing revisited
2.6.5Replication revisited
2.6.6Digest
2.7Equivalence transforms for recursive computations
2.7.1The feedback bottleneck
2.7.2Unfolding of first-order loops
2.7.3Higher-order loops
2.7.4Time-variant loops
2.7.5Nonlinear or general loops
2.7.6Pipeline interleaving is not an equivalence transform
2.7.7Digest
2.8Generalizations of the transform approach
2.8.1Generalization to other levels of detail
2.8.2Bit-serial architectures
2.8.3Distributed arithmetic
2.8.4Generalization to other algebraic structures
2.8.5Digest
2.9Conclusions
2.9.1Summary
2.9.2The grand architectural alternatives from an energy point of view
2.9.3A guide to evaluating architectural alternatives
2.10Problems
2.11Appendix I: A brief glossary of algebraic structures
2.12Appendix II: Area and delay figures of VLSI subfunctions
Chapter 3Functional Verification
Chapter 4Modelling Hardware with VHDL
Chapter 5The Case for Synchronous Design
Chapter 6Clocking of Synchronous Circuits
Chapter 7Acquisition of Asynchronous Data
Chapter 8Gate- and Transistor-Level Design
Chapter 9Energy Efficiency and Heat Removal
Chapter 10Signal Integrity
Chapter 11Physical Design
Chapter 12Design Verification
Chapter 13VLSI Economics and Project Management
Chapter 14A Primer on CMOS Technology
Chapter 15Outlook
Appendix AElementary Digital Electronics
Appendix BFinite State Machines
Appendix CVLSI Designer’s Checklist
Appendix DSymbols and constants
References
Index
